A Programmable Logic Device (“PLD”) was developed as a flexible tool to help designers generate specific logic functions from standard parts. Using PLDs, a system designer has the ability to build address decoders and gating logic for system boards, known as the “glue” logic within a system. This type of design can be implemented by assigning connection lists for the logic structure. In a conventional PLD, the input generates a true term and a compliment term, allowing a designer to select a polarity (i.e., a state of the input signal) for the logic structure. The polarities of the inputs are then presented to a connection array, allowing a designer to select the connection inputs to logic gates such as AND, OR, and AND OR Inputs (“AOI”) (e.g., multi-input AND gates). By selecting the connections, a designer would have the ability to specify the logic function. Special software allows designers to quickly write and set the desired connections. This software allows designers to assign names to pins and then write Boolean equations for how the terms are to be connected. Once the Input/Output (“IO”) names and Boolean equations are defined, the data are usually passed through a special compiler that builds a connect map for the device. The connect map acts as a database for describing how voltage is applied to give the desired connections as specified in the equations. To program a device, a blank part is put in a special programmer. The programmer applies voltages to the part according to the compiled connect map, resulting in a uniquely programmed device.
In conventional PLD structures, there are two common approaches of selecting the desired inputs: fuse blowing and using anti-fuse technology. The first approach, fuse blowing technology, uses a grid of connection lines that are connected to the inputs through fuses. All of the lines are initially connected to all of the inputs through fuses. When the programming procedure is complete, the fuses not desired for connection are removed, leaving only the desired connections. In programming the device, the programmer and PLD device work together to apply high voltages to the undesired locations. The metal fuse of the undesired connections is blown by the high voltage, opening the connection and removing it from the logic path. This approach typically requires high voltage circuitry and a substantial overhead in the overall design. In the second approach, anti-fuse technology uses anti-fuses made from amorphous material. Initially, the amorphous material is sandwiched between two metal lines. The amorphous material as deposited is non-conductive, isolating the lines from each other. Then, when a specific voltage level is applied to the amorphous material, the characteristics of the material change from non-conducting to conducting. This allows the metal lines at the point of applied voltage to be shorted, creating the desired connections. The formation of a connection using amorphous material is the opposite of fuse technology. In particular, the application of the specific voltage level creates a desired connection instead of removing an undesired connection, thus the name “anti-fuse.”
Both fuse blowing and anti-fuse technologies have limitations. The fuse and anti-fuse material cannot be tested. Once the part is programmed (e.g., once the fuse is blown or the anti-fuse connection is created), it is permanent and cannot be reset for customer use. This might result in a relatively high dead-on-arrival (“DOA”) rate for parts. This problem has been addressed by special test circuitry that allows for partial testing of the logic. However, this adds logic that does not add to the functional operation of the part, resulting in an increased die size (and price) without increased function. Since neither technology is reprogrammable, the parts do not allow for dynamic reprogramming. Once the part is programmed, it is permanent and any changes would require using a new part. Further, these technologies use non-standard CMOS processes and cannot be incorporated into standard CMOS designs.
There are continuing efforts to improve PLD devices.